Kazunori UEDA

Kazunori Ueda received the M. Eng. and Dr. Eng. degrees in information engineering from the University of Tokyo in 1980 and 1986, respectively. He joined NEC Corporation in 1983 and worked mainly on the design and implementation of concurrent logic programming languages as part of the Fifth Generation Computer Systems (FGCS) project. He designed Guarded Horn Clauses (GHC) in 1984, which became the basis of the Kernel Language, KL1, of the FGCS project.

From 1985 to 1992, he was with the Institute for New Generation Computer Technology (ICOT) on loan from NEC. He joined Waseda University, Department of Information and Computer Science in 1993, and has been Professor since 1997 till now. In 2003 the department was reorganized into the (larger) Department of Computer Science, where he was the first head. He also taught at the University of Tokyo in 1994-2000 and was a visiting scientist at National University of Singapore in 2000-2001. He has been Visiting Professor of National Institute for Informatics since 2006, and Visiting Professor of Egypt-Japan University of Science and Technology (E-JUST) since 2010.

His current research interests include design and implementation of programming languages, concurrency and parallelism, high-performance verification, and hybrid systems. He has long worked on constraint-based concurrency and applications of constraint-based program analysis. His recent project is LMNtal (pronounced "elemental"), a model of concurrency and a concurrent programming language based on hierarchical graph rewriting, whose implementation has now evolved into a model checker with visualizing tools.

He is a member of ACM, IEEE Computer Society, Association for Logic Programming (ALP), Japan Society for Software Science and Technology (JSSST), Information Processing Society of Japan (IPSJ), and Japanese Society for Artificial Intelligence (JSAI).

He acted and has been acting as a program committee member of a number of international conferences: FGCS'88, ICLP'90, PARLE'91, ICLP'91, ILPS'91, FGCS'92, JICSLP'92, ICCL'94, ICLP'94, ICLP'95, JICSLP'96, ILPS'97, Asian'97, JICSLP'98, FLOPS'99, ICLP'99, CP99, ICECCS 2000, TCS2000, AADEBUG 2000, FLOPS2001, PADL'01, ICLP'01, FLOPS2002, AADEBUG 2003, ICLP'03, ASIAN'03, FLOPS2004, APLAS 2004, AADEBUG 2005, ASIAN'06, SAC'08, FLOPS2008, SAC'09, ASIAN'09, IWNC 2009, APLAS 2009, PPDP 2010, APLAS 2010, PPDP 2011, FLOPS 2012, LCPC 2012, and RTA 2015, as well as a member of a number of domestic conferences on programming languages and parallel processing. He acted and has been acting as:

He acted as Area Editor of the Journal of Logic Programming from 1992 to 1999 (area: Design and Analysis of Languages and Systems), Area Editor of Theory and Practice of Logic Programming from 2000 to 2006 (area: Design and Analysis of Languages and Systems), Associate Editor of Computer Software of Japan Society for Software Science and Technology from 1996 to 2000, Editor-In-Chief of IPSJ Transactions on Programming from 1998 to 2000, and Editor-In-Chief of Computer Software, the Journal of Japan Society for Software Science and Technology from 2004 to 2008. He has been Area Editor of New Generation Computing (Ohmsha and Springer) (area: Programming and Architecture) since 2001 and Associate Editor since 2013. He has been Co-Chair of Asian Association for Foundations of Software since 2011.

He acted as an invited speaker, a tutorial speaker, or a panelist, at ICLP'87 (Melbourne), FGCS'88 (Tokyo), IFIP'89 (San Francisco), InfoJapan'90 (Tokyo), ILPS'91 (San Diego), ICLP'95 (Kanagawa), TACS'97 (Sendai), TACS2001 (Sendai), ICLP'01 (Paphos, Cyprus), ICLP'03 (Mumbai, India), WMC5 (Milano, Italy, 2004), and CHR2006 (Venice, Italy)

He was awarded IBM Japan Science Prize (computer science area) in 1993 for his research on concurrent logic programming languages.


Last update: July 3, 2013
ueda -at- ueda.info.waseda.ac.jp